Design and Verification Engineer, Nov. 2016 – Present

 Yonga Technology Microelectronics, Teknopark Istanbul, Pendik/Istanbul, Turkey


Real time validation for an AXI stream based IP                                                              Zynq architecture based Testing Environment which consists of AXI stream based IP, DMA IP, DDR RAM, UART, and Ethernet interface (Successfully finished).                                 Click Here For More Details

RTL based design for H.264 video encoder                                                                               In this project, H.264 video encoder (profile: BASELINE, Level:3.1) first implemented in MATLAB then over FPGA. The encoder was successfully tested over CYCLONE V FPGA. The encoder was downloaded into CYCLONE-V and the FPGA was connected with PC via Ethernet. The encoded bitstream of our encoder was decoded by the VLC media player in real time (via the ethernet connection).                                                                                   Click Here For More Details

RTL based design for the H.264 video decoder (ongoing)                                                   The decoder has been implemented in MATLAB successfully and its implementation over FPGA is ongoing.


Design and Verification Engineer, July 2016 – Oct. 2016

 Electra IC, Teknopark Istanbul, Pendik/Istanbul, Turkey

We have designed different register-transfer level (RTL) based projects in FPGA. I have also done debugging of some RTL based design by using Chipscope (ise xilinx) or ILA (vivado) or SignalTap (Altera). Timing constraints problems have been solved by tracking that either the critical path is the actual path (solved by Pipelining) or the false path (solved by multicycle paths or by setting max delay).


Research and Development Engineer, September 2015  – July 2016

 KUTSAL Research Lab, Kocaeli University, Kocaeli, Turkey

I have designed and implemented low complexity motion estimation for both H.264 (AVC) and H.265 (HEVC) video compression standards first in MATLAB and then in FPGA (ZYNQ series FPGAs e.g. ZedBoard). I have published the journal papers based on above-underlined topics in well-reputed journals (IEEE and other SCI journals).


Trainee Engineer, Summer Internship, June 2013 – August 2013

National Institute of Electronics, Islamabad, Pakistan

I have learned and observed the different tests ( EMC(Electro Magnetic Compatibility) testing, Safety tests ) for electronic devices and then learned how to make a report on these tests.